A hot-swap circuit applies power from an input source to a load in a controlled and protected fashion. One function of such a controller is to limit inrush currents from the power source to the load, especially load capacitance, when power is first applied or if the power source voltage suddenly increases. Another function is to limit current if the load attempts to draw too much current, for example if there is a short circuit in the load.
FIG. 1 shows a conventional hot-swap circuit that uses a single MOSFET 100 (Q1) in series with a current sense resistor 102 (RS1) along with control circuitry for limiting current. Numerous such circuits are commercially available. When limiting current, a current limit amplifier 104 adjusts the MOSFET gate to source voltage in order to limit the voltage across the current sense resistor 102 and thus the current through the MOSFET 100. The current limit amplifier 104 compares a voltage representing the current in the current sense resistor 102 with a voltage VLIMIT produced by a voltage source 106 to control the gate of the MOSFET 100 so as to reduce the output current when the sensed current exceeds a maximum value established by the voltage VLIMIT. A current source 108 is provided for pulling up the gate voltage. A transistor 110 is provided for turning the hot swap circuit on or off.
During this time, the voltage and current through the MOSFET 100 can both be large, resulting in high power dissipation in the MOSFET 100. If this power dissipation persists, the MOSFET 100 can reach temperatures that cause damage. MOSFET manufacturers present the safe limits on MOSFET voltage, current and time, as a curve referred to as Safe Operating Area (SOA). Commonly, a timer circuit 112 sets a maximum time the MOSFET will operate in current limit. The timer circuit 112 is coupled to the status pin of the current limit amplifier 104 to detect the time moment when the current limit amplifier 104 begins limiting the current. When the delay period set by the timer circuit 112 expires, the MOSFET 100 is turned off to protect it from overheating. The load will lose power and the hot swap controller will indicate that a fault has occurred.
Often high power hot-swap applications need to charge large bypass capacitors 126 (CL) across the load. To reduce stress on the MOSFET 100, the load may be kept off until the bypass capacitors 126 are charged. A small charging current for the capacitance keeps the power in the MOSFET 100 low enough to prevent a dangerous rise in temperature. One method to reduce the charging current uses a capacitor 125 coupled between the MOSFET gate and ground to limit the voltage slew rate of the gate pin. The gate voltage is pulled up by a current from the current source 108 commonly in the range of 10-50 μA. The MOSFET 100 acts as a source follower while charging the load capacitance. Another method uses the current limit amplifier 104 to set the current charging the load capacitance. Either method can lower the inrush current such that the startup period stays within the SOA of the MOSFET 100. When the charging is finished, the hot-swap controller can provide an output indicating the power path is on (PATH_ON) to show that full current is available to the load. The on-state of a switch can be determined by monitoring its control signal. For the MOSFET switch 100, for example, this can be done with a hysteresis comparator 118 comparing the gate to source voltage of the MOSFET 100 with a threshold voltage produced by a voltage source 116 well above the MOSFET threshold voltage, for example, at 4.5 V.
The hot swap switch itself has resistance which is a source of power loss in the system. In MOSFET switches, this resistance is referred to as on-resistance. High power systems with large load currents have a significant power loss due to this on-resistance. Often, as illustrated in FIG. 2, conventional high current hot-swap circuits use several MOSFETs 200, 203 (Q1 and Q2) arranged in parallel to achieve a low on-resistance that is unavailable using a single MOSFET. The hot swap circuit in FIG. 2 uses current and power control circuitry elements 202, 204, 206, 208 210, 212, 216, 218, 225, 226 similar to the respective elements in FIG. 1.
At high power levels it is difficult to find MOSFETs with both sufficient SOA capability and low enough on-resistance to serve as hot swap switches. High SOA capability is strongly linked to the amount of die area in a MOSFET that can dissipate the power. Most modern MOSFET production focuses on reducing both die area and on-resistance, which also reduces SOA capability. MOSFET processes with high SOA generally have high on-resistance per unit die area. Conversely, MOSFETS with low SOA tend to have low on-resistance per unit area. For high power applications, achieving the necessary SOA in a single MOSFET is often neither practical nor economical.
Using multiple MOSFETs in parallel reduces the combined on-resistance, but does not necessarily increase the SOA. Parallel MOSFETs share current well when their channels are fully enhanced because the MOSFET on-resistance has a positive temperature coefficient. However, when limiting current parallel MOSFETs usually operate in saturation with high drain to source voltages. They do not share current well because their threshold voltages are not matched and have a negative temperature coefficient. This allows the MOSFET with the lowest threshold voltage to carry more current than the others. As this MOSFET heats it tends to carry even more current as its threshold voltage drops further. Thus, all of the load current may be carried by a single MOSFET. For this reason, when a group of parallel MOSFETs operate to limit current, they can only be relied on to have the SOA of a single MOSFET.
Not all loads can be turned off during startup and inrush. A gate capacitor will limit inrush current to load capacitance. However, it does not limit current flowing to a resistive load or resistive fault across the load. This additional current adds to the stress imposed on the MOSFET switch and increases the required SOA.
Therefore, it would be desirable to develop inrush current control circuitry and methodology for controlling multiple switches so as to overcome the above discussed disadvantages.